The NRXFERGATE component models a tristate buffer with an active-high enable input and reduced output strength.

The truth table for the device is

where $\mathrm{UW}\=\{\begin{array}{cc}U& \mathrm{dataIn}\=U\\ W& \mathrm{otherwise}\end{array}$ and Strength Reduced means $\left\{0\to L\,1\to H\,X\to W\right\}$

The $t_{\mathrm{HL}}$ and $t_{\mathrm{LH}}$ parameters specify the output transition delay. If the signal goes from low to high, the delay to the output is $t_{\mathrm{LH}}$; if the signal width is less than $t_{\mathrm{LH}}$ then the output does not change. Conversely for $t_{\mathrm{HL}}$.

The component described in this topic is from the Modelica Standard Library. To view the original documentation, which includes author and copyright information, click here.