As the PC makers push for DC-DC converters delivering >150 Amps at output voltages =1V within the next few years, the semiconductor manufacturers are pushing to optimize their MOSFET by improving both the silicon and the packages to provide switching devices suitable for these challenges. In this paper we will address the parasitic resistance attributed to the package alone and in isolation from the silicon on-resistance. We will show that in most of the traditional packages this resistance has a very strong frequency dependent component. This means that at a switching frequency of about a few Megahertz, this parasitic resistance will constitute a large percentage of the total device on-resistance and hence influences the losses greatly. Based on this observation, we will concentrate on the topology of choice, the synchronous buck converter, and we will derive conduction loss equations that are frequency dependent and calculate actual losses and examine several effects that follow.